Not applicable.
1. Field of Invention
The present invention is related to temperature measurement techniques with semiconductor circuitry, a use of which may be to determine diode junction temperatures with greater accuracy than previously known. More specifically, the present invention relates to the method and apparatus of exciting levels of applied collector current IC to a diode, sensing changes in output characteristics such as base-emitter voltage (VBE) values, and calculating diode junction temperature free of series and parallel parasitic effects from a comparison of applied input, sensed output and calculated constant values.
2. Description of Related Art
The accurate determination of the temperature under which a diode is operating may serve vastly different purposes. Diodes, as with many semiconductors, exhibit general temperature dependence where at a given constant diode current, there will be an approximate 2 mV voltage drop across the diode for each 1 degree C. increase in operating temperature. Therefore diode performance is often scaled relative to operating temperatures.
The temperature dependence of a diode allows the diode to be used as a temperature measuring device in several applications, as well as a temperature compensating component in many other circuits. For instance, certain emitter-coupled logic (ECL) gates require a reference voltage in the center of the logic swing for all operating temperatures. The temperature dependence of diodes allows the construction of temperature-compensated bias supply circuits for ECL gates to better serve this purpose. However, a less productive result of this temperature dependence can produce unwanted values as well, such as reverse diode currents. Therefore to ensure proper design, it is often very important to know the operating temperature of operational diodes.
Prior art U.S. Pat. No. 5,195,827, issued Mar. 23, 1993 to Audy et al. sets forth a number of methods to measure diode temperature. One method involves the immersion of the device in a heated or chilled bath. Device input and output values are then measured and used to calibrate the device to the known temperature of the bath. However, as Audy et al. points out, this is a complex and time consuming method and accurate predictions at temperatures other than bath temperature are not guaranteed.
A second method involves the actual placement of a calibrated thermometer on the device. However, it is often difficult to achieve satisfactory contact between device and thermometer, and in addition, once contact is established temperature variations within the device substrate do not guarantee an accurate temperature reading from the point of contact. The prior art further states such temperature measurement techniques are subject to additional inaccuracies due to junction characteristics such as doping densities, junction area and surface defects. A solution addressing these factors has been the use of two separate junctions fabricated on the same substrate, operated at different current levels. Unfortunately this dual junction approach is subject to further inaccuracies due to series base and emitter resistance values present in the device.
As Audy et al. points out, many devices exhibit a defined temperature dependence which may be used to calculate the actual device temperature when several variables are known. Specifically, Audy et al. discloses a temperature measurement technique in which known input signals are applied to a p-n junction device, such as a bipolar transistor, and temperature dependent output signals corresponding to each input signal are measured. Since the operating characteristics of the device are known, a comparison of the excitation levels applied and the temperature dependent output values observed may be used to determine the operating temperature of the device. The applied excitation signal may be either base-emitter voltage VBE or collector current IC. If the applied excitation signal is base-emitter voltage VBE, the temperature dependent output value measured is collector current IC, and in a similar fashion, if the applied excitation signal is collector current, the temperature dependent output value measured is base-emitter voltage.
Audy et al. discloses a method which measures semiconductor substrate temperature by exciting and applying three levels of either base-emitter voltage VBE or collector current IC to a p-n junction device and sensing the varying temperature dependent output signal values. The temperature may then be calculated from the known characteristics of the device through a comparison of the signals. The purpose of a three level excitation signal application is to eliminate parasitic base resistance rb and the series emitter resistance re values present in conventional p-n junction devices.
If only two excitation levels are applied, the temperature measurement will continue to be affected by parasitic base and series emitter resistance as shown in the dual junction approach, resulting in an incorrect measurement. To address this problem, Audy et al. discloses the use of a third excitation level which eliminates the effects of both rb and re. It is pointed out a three level excitation method works well with bipolar transistor devices, however when other p-n junction devices such as a conventional diode is measured, the accuracy of the three level excitation method may be degraded for various reasons. One factor leading to measurement degradation is the effects of parallel resistance and offset current effects present in devices such as diodes, which are not fully eliminated using a three level excitation method. Although the three level excitation method works well eliminating the effects of parasitic base resistance and series emitter resistance effects, so called series parasitic effects, the method fails to eliminate the effects of parallel resistances and offset currents, so called parallel parasitic effects. At full temperature this prior art method may read device temperature incorrectly by as much as several degrees C.
The multiple level excitation method taught by Audy et al. eliminates the inaccuracies of parasitic base resistance and emitter resistance through the use of three excitation levels of a single device, rather than a base-emitter voltage VBE comparison between two separate junctions as in the dual junction method. The use of three sequential excitation levels eliminates series resistances such as parasitic base and series emitter resistance but does not address parallel parasitic effects. The prior art method to determine p-n junction device temperature is based on the application of three or more collector currents and may begin with the application of collector currents I1-I4,
I=[I1,I2,I3,I4]
The temperature dependent output signal base-emitter voltage xcex94VBE is then measured as,
xcex94VBE=mVTxc3x97ln[(I3xc3x97I2)/(I1xc3x97I4)]+RS(I3+I2xe2x88x92I1xe2x88x92I4)
where RS represents series parasitic resistance and xcex94VBE represents the change in base-emitter voltage used to determine temperature. If collector currents I1-I4 are chosen such that,
(I3+I2xe2x88x92I1xe2x88x92I4)=0
then,
xcex94VBE=mVTxc3x97ln[(I3xc3x97I2)/(I1xc3x97I4)]
As seen in the prior art resulting equation, the change in base-emitter voltage value xcex94VBE may be calculated free of series parasitic RS effects, however, current offset and parasitic parallel resistance are not taken into consideration and result in inaccuracies in xcex94VBE calculations. Any temperature calculation based upon xcex94VBE would also include these inaccuracies.
Therefore what is needed is a measurement technique to accurately determine device temperature with the ability to cancel out series parasitic effects, such as voltage offset and series resistance, in addition to parallel parasitic effects, such as leakage current and parallel resistance.
It is the object of the present invention to create a method and apparatus which may be used to determine diode junction temperatures with greater accuracy than previously known. The present invention achieves this goal by testing a device with four or more levels of applied collector current, sensing changes in output characteristics such as base-emitter voltage VBE, cancelling or calculating the device leakage current value and cancelling the parallel leakage effects. The cancelled or calculated leakage current consists of both a constant leakage current, current offset, and an additional leakage current due to a parasitic parallel resistance. The p-n junction device temperature may then be measured by exciting four levels of applied collector current and sensing changes in output characteristics such as base-emitter voltage in which both parasitic series resistance and parallel leakage current errors are cancelled. Since the operating characteristics of a p-n junction device are temperature dependent, the excitation levels applied and output values observed may be used to determine the junction temperature of the device free of series and parallel parasitic effects.
The present invention is superior to prior multiple level excitation methods and apparatus in that four or more excitation levels are used to eliminate both series parasitic and parallel parasitic effects. The result is an M-Level excitation method, where M is greater than or equal to four, which produces a more accurate measurement of p-n junction devices than traditional three or four level excitation methods due to parallel parasitic effects. The prior art multiple level excitation methods only cancel series parasitic effects, such as series resistance and voltage offset values. Through the use of four or more excitation levels, the present invention determines the junction temperature of the device free of both series and parallel resistance effects, and voltage and current offset effects.